4396 search results - page 623 / 880 » Measuring the Architecture Design Process |
202
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FPGA
2009
ACM
16 years 1 months ago
2009
ACM
Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates above 100MHz. This combined with FPGA’s lo...
182
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GECCO
2003
Springer
15 years 12 months ago
2003
Springer
This poster paper summarizes our research on fault tolerance arising as a by-product of the evolutionary computation process. Past research has shown evidence of robustness emergin...
164
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BMCBI
2005
15 years 6 months ago
2005
Background: A new algorithm for assessing similarity between primer and template has been developed based on the hypothesis that annealing of primer to template is an information ...
175
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DAC
2002
ACM
16 years 7 months ago
2002
ACM
In this paper, we present a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we p...
198
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MICCAI
2002
Springer
16 years 7 months ago
2002
Springer
Abstract. High performance computing has become a key step to introduce computer tools, like real-time registration, in the medical field. To achieve real-time processing, one usua...