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ICCAD
2010
IEEE
136views Hardware» more  ICCAD 2010»
15 years 4 months ago
Synthesis of an efficient controlling structure for post-silicon clock skew minimization
Clock skew minimization has been an important design constraint. However, due to the complexity of Process, Voltage, and Temperature (PVT) variations, the minimization of clock sk...
Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih...
TAMC
2007
Springer
16 years 29 days ago
Improving the Average Delay of Sorting
In previous work we have introduced an average-case measure for the time complexity of Boolean circuits – that is the delay between feeding the input bits into a circuit and the ...
Andreas Jakoby, Maciej Liskiewicz, Rüdiger Re...
202
Voted
MOBICOM
2010
ACM
15 years 7 months ago
Bartendr: a practical approach to energy-aware cellular data scheduling
Cellular radios consume more power and suffer reduced data rate when the signal is weak. According to our measurements, the communication energy per bit can be as much as 6x highe...
Aaron Schulman, Vishnu Navda, Ramachandran Ramjee,...
197
Voted
IMC
2010
ACM
15 years 4 months ago
Resolving IP aliases with prespecified timestamps
Operators and researchers want accurate router-level views of the Internet for purposes including troubleshooting and modeling. However, tools such as traceroute return IP address...
Justine Sherry, Ethan Katz-Bassett, Mary Pimenova,...
HPCA
2006
IEEE
16 years 7 months ago
Construction and use of linear regression models for processor performance analysis
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...