Sciweavers

4396 search results - page 422 / 880
» Measuring the Architecture Design Process
Sort
View
DAC
2008
ACM
16 years 7 months ago
Cache modeling in probabilistic execution time analysis
Multimedia-dominated consumer electronics devices (such as cellular phone, digital camera, etc.) operate under soft real-time constraints. Overly pessimistic worst-case execution ...
Yun Liang, Tulika Mitra
ARCS
2009
Springer
16 years 1 months ago
Empirical Performance Models for Java Workloads
Abstract. Java is widely deployed on a variety of processor architectures. Consequently, an understanding of microarchitecture level Java performance is critical to optimize curren...
Pradeep Rao, Kazuaki Murakami
FPL
2005
Springer
98views Hardware» more  FPL 2005»
16 years 11 days ago
A Verilog RTL Synthesis Tool for Heterogeneous FPGAs
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
Peter Jamieson, Jonathan Rose
MIDDLEWARE
2005
Springer
16 years 10 days ago
Sensor bean: a component platform for sensor-based services
Sensor-based services propose to gather, manage, analyze, access and react to sensor data. These services are distributed over heterogeneous platforms. The complexity of the imple...
Cristina Marin, Mikael Desertot
ICDCSW
2002
IEEE
15 years 11 months ago
Behavior and Performance of Message-Oriented Middleware Systems
The middleware technology used as the foundation of Internet-enabled enterprise systems is becoming increasingly complex. In addition, the various technologies offer a number of s...
Phong Tran, Paul Greenfield, Ian Gorton