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FPL
2008
Springer
104views Hardware» more  FPL 2008»
15 years 8 months ago
A technique for minimizing power during FPGA placement
This paper considers the implementation of an annealing technique for dynamic power reduction in FPGAs. The proposed method comprises a power-aware objective function for placemen...
Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Ya...
214
Voted
COMSUR
2011
213views Hardware» more  COMSUR 2011»
14 years 6 months ago
Securing BGP - A Literature Survey
Abstract—The Border Gateway Protocol (BGP) is the Internet’s inter-domain routing protocol. One of the major concerns related to BGP is its lack of effective security measures,...
Geoff Huston, Mattia Rossi, Grenville J. Armitage
FPL
2003
Springer
81views Hardware» more  FPL 2003»
16 years 1 hour ago
Software Decelerators
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...
Eric Keller, Gordon J. Brebner, Philip James-Roxby
DAC
2003
ACM
16 years 7 months ago
An adaptive window-based susceptance extraction and its efficient implementation
The determination of the set (or window) of segments that are inductively coupled to a significant degree with a given segment plays a fundamental role in window-based techniques ...
Guoan Zhong, Cheng-Kok Koh, Venkataramanan Balakri...
WWW
2006
ACM
16 years 7 months ago
Towards content trust of web resources
Trust is an integral part of the Semantic Web architecture. Most prior work on trust focuses on entity-centered issues such as authentication and reputation and does not take into...
Yolanda Gil, Donovan Artz