4396 search results - page 367 / 880 » Measuring the Architecture Design Process |
164
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FPL
2003
Springer
15 years 12 months ago
2003
Springer
We discuss high-performance programmable asynchronous pipeline arrays (PAPAs). These pipeline arrays are coarse-grain field programmable gate arrays (FPGAs) that realize high data...
178
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DAC
2002
ACM
16 years 7 months ago
2002
ACM
This paper presents novel uses of functional interface specifications for verifying RTL designs. We demonstrate how a simulation environment, a correctness checker, and a function...
169
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SAC
2009
ACM
16 years 1 months ago
2009
ACM
The understanding of human physical and physiological signals and expressions, together with a growing processing and control capacity allows for new approaches in interactive sys...
275
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ECCTD
2011
14 years 6 months ago
2011
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
195
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ICIP
2002
IEEE
16 years 8 months ago
2002
IEEE
Human observers can easily assess the quality of a distorted image without examining the original image as a reference. By contrast, designing objective No-Reference (NR) quality ...