4396 search results - page 366 / 880 » Measuring the Architecture Design Process |
177
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FPL
2009
Springer
15 years 11 months ago
2009
Springer
Spatially-tiled architectures, such as Coarse-Grained Reconfigurable Arrays (CGRAs), are powerful architectures for accelerating applications in the digital-signal processing, em...
151
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DAC
2001
ACM
16 years 7 months ago
2001
ACM
This presentation will give a list of design criteria an ASIC Design house need to look in the process of deciding to take the complex Bluetooth specification and implement everyt...
160
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DAC
2001
ACM
16 years 7 months ago
2001
ACM
Cost effective systems use specialization to optimize factors such as power consumption, processing throughput, flexibility or combinations thereof. Reconfigurable systems obtain ...
177
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DAC
2003
ACM
16 years 7 months ago
2003
ACM
Parameter variation in scaled technologies beyond 90nm will pose a major challenge for design of future high performance microprocessors. In this paper, we discuss process, voltag...
163
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ISVLSI
2006
IEEE
16 years 23 days ago
2006
IEEE
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...