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» Measuring the Architecture Design Process
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DAC
2008
ACM
16 years 7 months ago
TuneFPGA: post-silicon tuning of dual-Vdd FPGAs
Modern CMOS manufacturing processes have significant variability, which necessitates guard banding to achieve reasonable yield. We study an FPGA architecture with a dual voltage s...
Stephen Bijansky, Adnan Aziz
DAC
2006
ACM
16 years 21 days ago
DFM: where's the proof of value?
How can design teams employ new tools and develop response methodologies yet still stay within design budgets? How much effort does it require to be an early adopter and what kind...
Shishpal Rawat, Raul Camposano, A. Kahng, Joseph S...
174
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VLSID
2002
IEEE
75views VLSI» more  VLSID 2002»
16 years 7 months ago
Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts
Our target is automation of analog circuit's layout, which is a bottleneck in mixed-signal's design. We formulate the layout explicitly considering manufacturing process...
Yukiko Kubo, Shigetoshi Nakatake, Yoji Kajitani, M...
DGO
2007
150views Education» more  DGO 2007»
15 years 8 months ago
Integration of text-based applications into service-oriented architectures for transnational digital government
Significant efforts are currently being pursued by several countries and IT providers to deploy SOA (Service Oriented Architecture) designs of digital government systems that inte...
Andréa M. Matsunaga, Maurício O. Tsu...
CAL
2002
15 years 6 months ago
MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research
Abstract-- Computer architects must determine how to most effectively use finite computational resources when running simulations to evaluate new architectural ideas. To facilitate...
A. J. KleinOsowski, David J. Lilja