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IPPS
2006
IEEE
16 years 22 days ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
DPHOTO
2009
116views Hardware» more  DPHOTO 2009»
15 years 4 months ago
Interleaved imaging: an imaging system design inspired by rod-cone vision
Under low illumination conditions, such as moonlight, there simply are not enough photons present to create a high quality color image with integration times that avoid camera-sha...
Manu Parmar, Brian A. Wandell
143
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ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
16 years 20 days ago
Physical design implementation of segmented buses to reduce communication energy
Abstract— The amount of energy consumed for interconnecting the IP-blocks is increasing significantly due to the suboptimal scaling of long wires. To limit this energy penalty, ...
Jin Guo, Antonis Papanikolaou, Pol Marchal, Franck...
IPPS
2005
IEEE
16 years 9 days ago
A Mutual Anonymous Peer-to-Peer Protocol Design
Peer-to-Peer (P2P) computing has become a popular application model because of its easy resource sharing pattern and powerful query search scheme. However, decentralized P2P archi...
Jinsong Han, Yunhao Liu, Li Xiao, Renyi Xiao, Lion...
DFKI
2005
Springer
16 years 7 days ago
Agents Enacting Social Roles. Balancing Formal Structure and Practical Rationality in MAS Design
Abstract. We introduce an integrated approach to the conceptualisation, implementation and evaluation of a MAS (multi-agent system) which is based on sociological concepts of pract...
Martin Meister 0002, Diemo Urbig, Kay Schröte...