4396 search results - page 280 / 880 » Measuring the Architecture Design Process |
174
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ISVLSI
2007
IEEE
16 years 27 days ago
2007
IEEE
In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto front is introduced as a useful analysis tool to explore the design space of e...
163
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IPPS
2006
IEEE
16 years 20 days ago
2006
IEEE
In this paper we show how high-level UML models of mobile computing applications can be analysed for classical performance measures such as throughput. The approach proceeds by co...
157
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ISCAS
2005
IEEE
16 years 6 days ago
2005
IEEE
: This paper presents a self-calibration method for designing high speed pipeline ADCs. Unlike all existing calibration algorithms, the proposed calibration does not insert any tes...
179
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ENTCS
2006
15 years 6 months ago
2006
In the domain of embedded software systems the increasing complexity of the functionality as well as the increase in variations caused by product lines requires a modular design p...
138
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JUCS
2006
15 years 6 months ago
2006
: This paper proposes a Human-centered Pervasive Computing System Model (HPC), a Layered Architectural Analysis and Design Method (LAAD) and a Waterfall Prototyping Process Model (...