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CSREAESA
2006
15 years 8 months ago
An Efficient Design of High Speed Network Security Platform using Network Processor
: The explosive growth of internet traffic and the increasing complexity of the functions performed by network nodes have given rise to a new breed of programmable micro-processors...
Yong-Sung Jeon, Sang-Woo Lee, Ki-Young Kim
IAJIT
2010
140views more  IAJIT 2010»
15 years 5 months ago
HW/SW Design-Based Implementation of Vector Median Rational Hybrid Filter
: A new code sign implementation of vector median rational hybrid filter based on efficient hardware/software implementation is introduced and applied to colour image filtering pro...
Anis Boudabous, Ahmed Ben Atitallah, Lazhar Khriji...
VLDB
2007
ACM
198views Database» more  VLDB 2007»
16 years 6 months ago
The End of an Architectural Era (It's Time for a Complete Rewrite)
In previous papers [SC05, SBC+07], some of us predicted the end of "one size fits all" as a commercial relational DBMS paradigm. These papers presented reasons and exper...
Michael Stonebraker, Samuel Madden, Daniel J. Abad...
CODES
2005
IEEE
16 years 7 days ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
DAC
2010
ACM
15 years 10 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...