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DAC
1998
ACM
16 years 7 months ago
Practical Experiences with Standard-Cell Based Datapath Design Tools: Do We Really Need Regular Layouts?
Commercial tools for standard-cell based datapath design are here classed according to design flows, and the advantages of each class are discussed with the results of two test ci...
Alexander Grießing, Paolo Ienne
ICCD
2006
IEEE
133views Hardware» more  ICCD 2006»
16 years 3 months ago
Patching Processor Design Errors
— Microprocessors can have design errors that escape the test and validation process. The cost to rectify these errors after shipping the processors can be very expensive as it m...
Satish Narayanasamy, Bruce Carneal, Brad Calder
ISCAS
2006
IEEE
106views Hardware» more  ISCAS 2006»
16 years 19 days ago
A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time
—This paper presents a Frequency-Estimation Algorithm for the ADPLL designs instead of traditional binary frequency-search algorithm. With the proposed ADPLL architecture and syn...
Chia-Tsun Wu, Wei Wang, I-Chyn Wey, An-Yeu Wu
ISARCS
2010
240views Hardware» more  ISARCS 2010»
15 years 8 months ago
Engineering a Distributed e-Voting System Architecture: Meeting Critical Requirements
Voting is a critical component of any democratic process; and electronic voting systems should be developed following best practices for critical system development. E-voting has i...
J. Paul Gibson, Eric Lallet, Jean-Luc Raffy
ANCS
2010
ACM
15 years 4 months ago
An architecture for software defined cognitive radio
As we move forward towards the next generation of wireless protocols, the push for a better radio physical layer is ever increasing. Conventional radio architectures are limited t...
Aveek Dutta, Dola Saha, Dirk Grunwald, Douglas C. ...