4396 search results - page 221 / 880 » Measuring the Architecture Design Process |
141
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ISCA
1993
IEEE
15 years 10 months ago
1993
IEEE
Virtual memoy page translation tables provide mappings from virtual to physical addresses. When the hardware controlled Tratmlation L.ookaside Buffers (TLBs) do not contain a tran...
143
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VR
2007
IEEE
16 years 24 days ago
2007
IEEE
In this paper we present an in situ evaluation of a haptic system, with a representative test population, we aim to determine what, if any, benefit haptics can have in a biomolec...
204
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FAST
2004
15 years 8 months ago
2004
This paper explores the concept of early discard for interactive search of unindexed data. Processing data inside storage devices using downloaded searchlet code enables Diamond t...
168
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ICIP
2000
IEEE
16 years 8 months ago
2000
IEEE
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
165
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ESTIMEDIA
2004
Springer
15 years 12 months ago
2004
Springer
Abstract—Few analytical performance models that relate performance figure of merit to architectural design decisions are reported in recent studies of network-on-chip, which pre...