4396 search results - page 204 / 880 » Measuring the Architecture Design Process |
154
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ICMCS
2005
IEEE
16 years 3 days ago
2005
IEEE
The paper presents a high-performance architecture of the bit-plane coder for the embedded block coding algorithm in JPEG 2000. The architecture adopts a pipeline structure and is...
175
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MATA
2005
Springer
16 years 6 hour ago
2005
Springer
Abstract. Recent advances in materials, sensing, power harvesting, contextawareness and miniaturisation have opened-up the possibility of constructing materials that directly inclu...
148
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ISCAS
2003
IEEE
15 years 11 months ago
2003
IEEE
—This paper presents high-speed parallel Reed–Solomon (RS) (255,239) decoder architecture using modified Euclidean algorithm for the high-speed multigigabit-per-second fiber op...
148
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EFDBS
2001
15 years 8 months ago
2001
Abstract. This paper focuses on the interoperability of autonomous legacy databases with the idea of meeting the future requirements of an organization. It describes a general arch...
173
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FPL
2003
Springer
15 years 11 months ago
2003
Springer
At Leiden Embedded Research Center (LERC), we are building a tool chain called Compaan/Laura that allows us to map fast and efficiently applications written in Matlab onto recon...