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CF
2004
ACM
15 years 12 months ago
Fault tolerant clockless wave pipeline design
This paper presents a fault tolerant design technique for the clockless wave pipeline. The specific architectural model investigated in this paper is the two-phase clockless asyn...
T. Feng, Byoungjae Jin, J. Wang, Nohpill Park, Yon...
SIPS
2008
IEEE
16 years 27 days ago
The support of software design patterns for streaming RPC on embedded multicore processors
The development of embedded system has been toward the multicore architectures in the recent years. It raises concerns in the community of supporting programming models and langua...
Kun-Yuan Hsieh, Yen-Chih Liu, Chi-Hua Lai, Jenq Ku...
ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
16 years 24 days ago
High Speed 1-bit Bypass Adder Design for Low Precision Additions
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
Jong-Suk Lee, Dong Sam Ha
INFSOF
2007
83views more  INFSOF 2007»
15 years 6 months ago
On the design of more secure software-intensive systems by use of attack patterns
Retrofitting security implementations to a released software-intensive system or to a system under development may require significant architectural or coding changes. These late...
Michael Gegick, Laurie Williams
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 10 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli