Sciweavers

4396 search results - page 193 / 880
» Measuring the Architecture Design Process
Sort
View
DSD
2007
IEEE
178views Hardware» more  DSD 2007»
16 years 25 days ago
An Efficient Intra Prediction Hardware Architecture for H.264 Video Decoding
In this paper, we present an efficient hardware architecture for real-time implementation of intra prediction algorithm used in H.264 / MPEG4 Part 10 video coding standard. The ha...
Esra Sahin, Ilker Hamzaoglu
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 10 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
SWS
2005
ACM
16 years 1 days ago
Web services enterprise security architecture: a case study
Web Services (WS hereafter) Security is a crucial aspect for technologies based on this paradigm to be completely adopted by the industry. As a consequence, a lot of initiatives h...
Carlos Gutiérrez, Eduardo Fernández-...
DAC
2007
ACM
15 years 10 months ago
A Framework for the Validation of Processor Architecture Compliance
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jae...
DAC
2003
ACM
16 years 7 months ago
A low-energy chip-set for wireless intercom
A low power wireless intercom system is designed and implemented. Two fully-operational ASICs, integrating custom and commercial IP, implement the entire digital portion of the pr...
M. Josie Ammer, Michael Sheets, Tufan C. Karalar, ...