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ISVLSI
2007
IEEE
184views VLSI» more  ISVLSI 2007»
16 years 23 days ago
Activity-Aware Registers Placement for Low Power Gated Clock Tree Construction
As power consumption of the clock tree dominates over 40% of the total power in modern high performance VLSI designs, measures must be taken to keep it under control. One of the m...
Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu
EXPDB
2006
ACM
16 years 14 days ago
Pushing XPath Accelerator to its Limits
Two competing encoding concepts are known to scale well with growing amounts of XML data: XPath Accelerator encoding implemented by MonetDB for in-memory documents and X-Hive’s ...
Christian Grün, Alexander Holupirek, Marc Kra...
SAC
2006
ACM
16 years 13 days ago
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
AINA
2005
IEEE
16 years 3 days ago
Throughput Driven, Highly Available Streaming Stored Playback Video Service over a Peer-to-Peer Network
Streaming video is a key functionality in Internet based services such as distant education, VoD etc.,. The high bandwidth requirements associated with such applications coupled w...
K. Kalapriya, S. K. Nandy
INFOCOM
2005
IEEE
16 years 2 days ago
Bayesian packet loss detection for TCP
— One of TCP’s critical tasks is to determine which packets are lost in the network, as a basis for control actions (flow control and packet retransmission). Modern TCP implem...
Nahur Fonseca, Mark Crovella
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