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ISCA
2008
IEEE
143views Hardware» more  ISCA 2008»
15 years 6 months ago
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...
Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael...
ENTCS
2007
105views more  ENTCS 2007»
15 years 6 months ago
Narrowing and Rewriting Logic: from Foundations to Applications
Narrowing was originally introduced to solve equational E-unification problems. It has also been recognized as a key mechanism to unify functional and logic programming. In both ...
Santiago Escobar, José Meseguer, Prasanna T...
ENTCS
2002
113views more  ENTCS 2002»
15 years 6 months ago
An Operational Semantics for Declarative Multi-Paradigm Languages
Practical declarative multi-paradigm languages combine the main features of functional, logic and concurrent programming (e.g., laziness, sharing, higher-order, logic variables, n...
Elvira Albert, Michael Hanus, Frank Huch, Javier O...
CJ
2010
190views more  CJ 2010»
15 years 4 months ago
A Methodological Construction of an Efficient Sequentially Consistent Distributed Shared Memory
A concurrent object is an object that can be concurrently accessed by several processes. Sequential consistency is a consistency criterion for such objects. Informally, it states ...
Vicent Cholvi, Antonio Fernández, Ernesto J...
ASPLOS
2011
ACM
14 years 10 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...