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APCSAC
2003
IEEE
16 years 4 days ago
L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy
The RAMpage hierarchy moves main memory up a level to replace the lowest-level cache by an equivalent-sized SRAM main memory, with a TLB caching page translations for that main mem...
Philip Machanick, Zunaid Patel
SERP
2003
15 years 8 months ago
Memory Access Characteristics of Network Infrastructure Applications
Network infrastructure is composed of various devices located either in the core or at the edges of a wide-area network. These devices are required to deliver high transaction thr...
Abdul Waheed
FGCS
2006
119views more  FGCS 2006»
15 years 6 months ago
Simulation tools to study a distributed shared memory for clusters of symmetric multiprocessors
Distributed shared memory (DSM) systems have become popular as a means of utilizing clusters of computers for solving large applications. We have developed a high-performance DSM,...
Darshan Thaker, Vipin Chaudhary
WCET
2010
15 years 4 months ago
Precomputing Memory Locations for Parametric Allocations
Current worst-case execution time (WCET) analyses do not support programs using dynamic memory allocation. This is mainly due to the unpredictability of cache performance introduc...
Jörg Herter, Sebastian Altmeyer
ATAL
2011
Springer
14 years 6 months ago
Human-like memory retrieval mechanisms for social companions
This paper demonstrates a biologically- and psychologicallyinspired human-like computational memory focusing on the retrieval mechanisms – Spreading Activation and Compound Cue ...
Mei Yii Lim, Ruth Aylett, Patrícia Amâ...