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ARC
2010
Springer
387views Hardware» more  ARC 2010»
16 years 1 months ago
Optimising Memory Bandwidth Use for Matrix-Vector Multiplication in Iterative Methods
Computing the solution to a system of linear equations is a fundamental problem in scientific computing, and its acceleration has drawn wide interest in the FPGA community [1–3]...
David Boland, George A. Constantinides
AINA
2009
IEEE
16 years 1 months ago
A Fast and Memory Efficient Dynamic IP Lookup Algorithm Based on B-Tree
—This paper deals with the traditional IP address lookup problem with fast updates. We propose a B-tree data structure, called MMSPT (Multiway Most Specific Prefix Tree), which i...
Yeim-Kuan Chang, Yung-Chieh Lin
ICPP
2008
IEEE
16 years 1 months ago
Implementing and Exploiting Inevitability in Software Transactional Memory
—Transactional Memory (TM) takes responsibility for concurrent, atomic execution of labeled regions of code, freeing the programmer from the need to manage locks. Typical impleme...
Michael F. Spear, Michael Silverman, Luke Dalessan...
SP
2008
IEEE
16 years 1 months ago
Preventing Memory Error Exploits with WIT
Attacks often exploit memory errors to gain control over the execution of vulnerable programs. These attacks remain a serious problem despite previous research on techniques to pr...
Periklis Akritidis, Cristian Cadar, Costin Raiciu,...
IPPS
2007
IEEE
16 years 1 months ago
A Key-based Adaptive Transactional Memory Executor
Software transactional memory systems enable a programmer to easily write concurrent data structures such as lists, trees, hashtables, and graphs, where non-conflicting operation...
Tongxin Bai, Xipeng Shen, Chengliang Zhang, Willia...