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PPOPP
2010
ACM
16 years 4 months ago
Leveraging parallel nesting in transactional memory
Exploiting the emerging reality of affordable multi-core architeces through providing programmers with simple abstractions that would enable them to easily turn their sequential p...
João Barreto, Aleksandar Dragojevic, Paulo ...
SC
2009
ACM
16 years 1 months ago
Increasing memory miss tolerance for SIMD cores
Manycore processors with wide SIMD cores are becoming a popular choice for the next generation of throughput oriented architectures. We introduce a hardware technique called “di...
David Tarjan, Jiayuan Meng, Kevin Skadron
IEEEPACT
2009
IEEE
16 years 1 months ago
Architecture Support for Improving Bulk Memory Copying and Initialization Performance
—Bulk memory copying and initialization is one of the most ubiquitous operations performed in current computer systems by both user applications and Operating Systems. While many...
Xiaowei Jiang, Yan Solihin, Li Zhao, Ravishankar I...
IPPS
2007
IEEE
16 years 1 months ago
Programming Distributed Memory Sytems Using OpenMP
OpenMP has emerged as an important model and language extension for shared-memory parallel programming. On shared-memory platforms, OpenMP offers an intuitive, incremental approac...
Ayon Basumallik, Seung-Jai Min, Rudolf Eigenmann
CHES
2007
Springer
111views Cryptology» more  CHES 2007»
16 years 28 days ago
TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks
Replay attacks are often the most costly attacks to thwart when dealing with off-chip memory integrity. With a trusted System-on-Chip, the existing countermeasures against replay r...
Reouven Elbaz, David Champagne, Ruby B. Lee, Lione...