10805 search results - page 332 / 2161 » Mapping Computation with No Memory |
162
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HPCC
2009
Springer
15 years 11 months ago
2009
Springer
—The potential for destructive interference between running processes is increased as Chip Multiprocessors (CMPs) share more on-chip resources. We believe that understanding the ...
153
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IPPS
2000
IEEE
15 years 11 months ago
2000
IEEE
Time skewing is a compile-time optimization that can provide arbitrarily high cache hit rates for a class of iterative calculations, given a sufficient number of time steps and s...
185
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HPCA
1999
IEEE
15 years 11 months ago
1999
IEEE
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
152
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ICPP
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper describes a technique called producer-push that enhances the performance of a page-based software distributed shared memory system. Shared data, in software DSM systems...
192
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ICS
1999
Tsinghua U.
15 years 11 months ago
1999
Tsinghua U.
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...