10805 search results - page 293 / 2161 » Mapping Computation with No Memory |
192
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ICDCS
1996
IEEE
15 years 11 months ago
1996
IEEE
We consider a shared store based on distributed shared memory (DSM), supporting persistence by reachability (PBR), a very simple data sharing model for a distributed system. This ...
181
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BCS
2008
15 years 8 months ago
2008
This paper describes our approaches to raise the level of abstraction at which hardware suitable for accelerating computationally-intensive applications can be specified. Field-Pr...
173
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SPIN
2010
Springer
15 years 5 months ago
2010
Springer
This paper addresses the problem of verifying programs for the relaxed memory models implemented in modern processors. Specifically, it considers the TSO (Total Store Order) relax...
397
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DAC
2012
ACM
13 years 9 months ago
2012
ACM
Diverse IP cores are integrated on a modern system-on-chip and share resources. Off-chip memory bandwidth is often the scarcest resource and requires careful allocation. Two of t...
201
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ICMCS
2008
IEEE
16 years 1 months ago
2008
IEEE
We present an implementation of general FFTs for graphics processing units (GPUs). Unlike most existing GPU FFT implementations, we handle both complex and real data of any size t...