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ICPP
2008
IEEE
16 years 1 months ago
The MAP3S Static-and-Regular Mesh Simulation and Wavefront Parallel-Programming Patterns
— This paper presents the Simulation and Wavefront parallel-programming patterns of the MAP3S pattern-based parallel programming system for distributed-memory environments. Both ...
Robert Niewiadomski, José Nelson Amaral, Du...
SAC
2010
ACM
16 years 1 months ago
RTTM: real-time transactional memory
Hardware transactional memory is a promising synchronization technology for chip-multiprocessors. It simplifies programming of concurrent applications and allows for higher concu...
Martin Schoeberl, Florian Brandner, Jan Vitek
PACT
2007
Springer
16 years 24 days ago
Support for Fine-Grained Synchronization in Shared-Memory Multiprocessors
Abstract. It has been already verified that hardware-supported finegrain synchronization provides a significant performance improvement over coarse-grained synchronization mecha...
Vladimir Vlassov, Oscar Sierra Merino, Csaba Andra...
SC
2004
ACM
16 years 2 days ago
Using Hardware Counters to Automatically Improve Memory Performance
In this paper, we introduce a profile-driven online page migration scheme and investigate its impact on the performance of multithreaded applications. We use lightweight, inexpens...
Mustafa M. Tikir, Jeffrey K. Hollingsworth
SPDP
1991
IEEE
15 years 10 months ago
Local vs. global memory in the IBM RP3: experiments and performance modelling
A number of experiments regarding the placement of instructions, private data and shared data in the Non-Uniform-Memory-Access multiprocessor, RP3 has been performed. Three Scient...
Mats Brorsson