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DAC
1997
ACM
15 years 10 months ago
Low Energy Memory and Register Allocation Using Network Flow
This paper presents for the first time low energy simultaneous memory and register allocation. A minimum cost network flow approach is used to efficiently solve for minimum energy...
Catherine H. Gebotys
ICPP
2007
IEEE
16 years 28 days ago
Architectural Challenges in Memory-Intensive, Real-Time Image Forming
The real-time image forming in future, high-end synthetic aperture radar systems is an example of an application that puts new demands on computer architectures. The initial quest...
Anders Ahlander, H. Hellsten, K. Lind, J. Lindgren...
IPPS
1998
IEEE
15 years 11 months ago
Memory Hierarchy Management for Iterative Graph Structures
The increasing gap in processor and memory speeds has forced microprocessors to rely on deep cache hierarchies to keep the processors from starving for data. For many applications...
Ibraheem Al-Furaih, Sanjay Ranka
SIGGRAPH
1994
ACM
15 years 10 months ago
FBRAM: a new form of memory optimized for 3D graphics
FBRAM, a new form of dynamic random access memory that greatly accelerates the rendering of Z-buffered primitives, is presented. Two key concepts make this acceleration possible. ...
Michael F. Deering, Stephen A. Schlapp, Michael G....
PPOPP
2009
ACM
16 years 1 months ago
NePalTM: design and implementation of nested parallelism for transactional memory systems
Abstract. Transactional memory (TM) promises to simplify construction of parallel applications by allowing programmers to reason about interactions between concurrently executing c...
Haris Volos, Adam Welc, Ali-Reza Adl-Tabatabai, Ta...