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MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
16 years 17 days ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
IWMM
2011
Springer
270views Hardware» more  IWMM 2011»
14 years 9 months ago
Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Zoltan Majo, Thomas R. Gross
IPPS
2006
IEEE
16 years 17 days ago
Phylogenetic models of rate heterogeneity: a high performance computing perspective
Inference of phylogenetic trees using the maximum likelihood (ML) method is NP-hard. Furthermore, the computation of the likelihood function for huge trees of more than 1,000 orga...
Alexandros Stamatakis
DICTA
2007
15 years 8 months ago
Speeding up Mutual Information Computation Using NVIDIA CUDA Hardware
We present an efficient method for mutual information (MI) computation between images (2D or 3D) for NVIDIA’s ‘compute unified device architecture’ (CUDA) compatible devic...
Ramtin Shams, Nick Barnes
NIPS
2007
15 years 8 months ago
Parallelizing Support Vector Machines on Distributed Computers
Support Vector Machines (SVMs) suffer from a widely recognized scalability problem in both memory use and computational time. To improve scalability, we have developed a parallel ...
Edward Y. Chang, Kaihua Zhu, Hao Wang, Hongjie Bai...