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CF
2009
ACM
16 years 1 months ago
Strategies for dynamic memory allocation in hybrid architectures
Hybrid architectures combining the strengths of generalpurpose processors with application-specific hardware accelerators can lead to a significant performance improvement. Our ...
Peter Bertels, Wim Heirman, Dirk Stroobandt
ICPADS
2006
IEEE
16 years 18 days ago
Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edw...
WMPI
2004
ACM
15 years 12 months ago
A case for multi-level main memory
Current trends suggest that the number of memory chips per processor chip will increase at least a factor of ten in seven years. This will make DRAM cost, the space and the power i...
Magnus Ekman, Per Stenström
WMPI
2004
ACM
15 years 12 months ago
An analytical model for software-only main memory compression
Abstract. Many applications with large data spaces that cannot run on a typical workstation (due to page faults) call for techniques to expand the effective memory size. One such t...
Irina Chihaia, Thomas R. Gross
EMSOFT
2007
Springer
16 years 22 days ago
Block recycling schemes and their cost-based optimization in nand flash memory based storage system
Flash memory has many merits such as light weight, shock resistance, and low power consumption, but also has limitations like the erase-before-write property. To overcome such lim...
Jongmin Lee, Sunghoon Kim, Hunki Kwon, Choulseung ...