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» Mapping Computation with No Memory
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HPCA
2000
IEEE
15 years 11 months ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
DELTA
2008
IEEE
15 years 8 months ago
Dynamic Co-operative Intelligent Memory
As semiconductor technology advances, the performance gap between processor and memory has become one of the major issues in computer design. In order to bridge this gap, many met...
Xiaoyong Wen, Faycal Bensaali, Reza Sotudeh
DAC
2009
ACM
16 years 7 months ago
Energy-aware error control coding for Flash memories
The use of Flash memories in portable embedded systems is ever increasing. This is because of the multi-level storage capability that makes them excellent candidates for high dens...
Veera Papirla, Chaitali Chakrabarti
DAC
2002
ACM
16 years 7 months ago
Compiler-directed scratch pad memory hierarchy design and management
One of the primary challenges in embedded system design is designing the memory hierarchy and restructuring the application to take advantage of it. This task is particularly impo...
Mahmut T. Kandemir, Alok N. Choudhary
ISORC
2006
IEEE
16 years 16 days ago
Automatic Memory Management in Utility Accrual Scheduling Environments
Convenience, reliability, and effectiveness of automatic memory management have long been established in modern systems and programming languages such as Java. The timeliness req...
Shahrooz Feizabadi, Godmar Back