10805 search results - page 131 / 2161 » Mapping Computation with No Memory |
140
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ASAP
1997
IEEE
15 years 10 months ago
1997
IEEE
This paper introduces a powerful novel sequencer for controlling computational machines and for structured DMA (direct memory access) applications. It is mainly focused on applica...
179
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ARCS
2009
Springer
16 years 1 months ago
2009
Springer
Abstract. Many-core processor architectures require scalable solutions that reflect the locality and power constraints of future generations of technology. This paper presents a CM...
184
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
More and more the system verification makes use of hardware emulation techniques that allow a speed up in simulation performance up to thousand times. Typically, a design is comp...
169
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SIPS
2007
IEEE
16 years 21 days ago
2007
IEEE
— Long initial access cycles of SDRAM are the major performance burden of motion compensation in a video decoder. To minimize its effect while improve overall available memory ba...
362
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ISSS
2000
IEEE
15 years 10 months ago
2000
IEEE
In high-throughput real-time media processing systems, the communication between processing units is typically specified as multi-dimensional arrays. However, the implementation ...