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GLVLSI
2008
IEEE
120views VLSI» more  GLVLSI 2008»
16 years 29 days ago
SAT-based equivalence checking of threshold logic designs for nanotechnologies
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...
Yexin Zheng, Michael S. Hsiao, Chao Huang
NOCS
2007
IEEE
16 years 24 days ago
NoC Design and Implementation in 65nm Technology
As embedded computing evolves towards ever more powerful architectures, the challenge of properly interconnecting large numbers of on-chip computation blocks is becoming prominent...
Antonio Pullini, Federico Angiolini, Paolo Meloni,...
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
16 years 15 days ago
An automated design flow for 3D microarchitecture evaluation
- Although the emerging three-dimensional integration technology can significantly reduce interconnect delay, chip area, and power dissipation in nanometer technologies, its impact...
Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Re...
GROUP
2005
ACM
16 years 2 days ago
Design decisions in the RideNow project
The RideNow Project is designed to help individuals within a group or organization coordinate ad hoc shared rides. This paper describes three design decisions the RideNow team mad...
Rick Wash, Libby Hemphill, Paul Resnick
GECCO
2005
Springer
129views Optimization» more  GECCO 2005»
16 years 1 days ago
Morphing methods in evolutionary design optimization
Design optimization is a well established application field of evolutionary computation. However, standard recombination operators acting on the genotypic representation of the d...
Michael Nashvili, Markus Olhofer, Bernhard Sendhof...