14 search results - page 3 / 3 » Management policies for non-volatile write caches |
162
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USENIX
1993
15 years 7 months ago
1993
Robotic storage devices offer huge storage capacity at a low cost per byte, but with large access times. Integrating these devices into the storage hierarchy presents a challenge ...
138
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ISCA
2008
IEEE
16 years 13 days ago
2008
IEEE
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
141
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ISCA
2007
IEEE
16 years 10 days ago
2007
IEEE
Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously propos...
194
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ASPLOS
2010
ACM
15 years 9 months ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...