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190
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IPPS
2008
IEEE
16 years 1 months ago
2008
IEEE
—The performance bottleneck for many scientific applications is the cost of memory access inside linear algebra kernels. Tuning such kernels for memory efficiency is a complex ...
190
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HPCA
2007
IEEE
16 years 7 months ago
2007
IEEE
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
164
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HPCA
2006
IEEE
16 years 7 months ago
2006
IEEE
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
170
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EUC
2006
Springer
15 years 10 months ago
2006
Springer
Gossip-based protocol has been widely adopted by many large-scale multicast applications. In this paper, we study the impact of node cheating on decentralized gossip-based protocol...
169
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ICPP
1995
IEEE
15 years 10 months ago
1995
IEEE
Software barriers have been designed and evaluated for barrier synchronization in large-scale shared-memory multiprocessors, under the assumption that all processorsreach the sync...