We consider the impact of different communication architectures on the performability (performance + availability) of cluster-based servers. In particular, we use a combination of ...
We assert that in order to perform well, a shared-memory multiprocessorinter-process communication (IPC)facility mustavoid a) accessing any shared data, and b) acquiring any locks...
A three-dimensional (3D) CMOS imager constructed from stacking a pixel array of image sensors, an analog-to-digital converter (ADC) array, and an image signal processor (ISP) arra...
This paper presents QLSE (QoS-constrained List Scheduling hEuristics), a Quality of Service-based launch time scheduling algorithm for wide area Grids. QLSE considers applications...
Modern applications for mobile computing require high performance architectures. On the other hand, there are restrictions such as storage or power consumption. The use of reconï¬...