3373 search results - page 163 / 675 » Malleable applications for scalable high performance computi... |
206
click to vote
IROS
2009
IEEE
16 years 1 months ago
2009
IEEE
— A major barrier preventing the wide employment of mobile networks of robots in tasks such as exploration, mapping, surveillance, and environmental monitoring is the lack of ef...
205
click to vote
JSA
2010
15 years 1 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
184
click to vote
ICDCS
2010
IEEE
15 years 8 months ago
2010
IEEE
—Server consolidation based on virtualization is a key ingredient for improving power efficiency and resource utilization in cloud computing infrastructures. However, to provide...
172
click to vote
IWOMP
2009
Springer
16 years 1 months ago
2009
Springer
OpenMP relies heavily on barrier synchronization to coordinate the work of threads that are performing the computations in a parallel region. A good implementation of barriers is ...
184
click to vote
CLUSTER
2006
IEEE
16 years 18 days ago
2006
IEEE
IP routers are now increasingly expected to do more than just traditional packet forwarding – they must be extensible as well as scalable. It is a challenge to design a router a...