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CGO
2010
IEEE
16 years 1 months ago
Automatic creation of tile size selection models
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sa...
CODES
2008
IEEE
16 years 24 days ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
ISPASS
2008
IEEE
16 years 21 days ago
Metrics for Architecture-Level Lifetime Reliability Analysis
Abstract— This work concerns metrics for evaluating microarchitectural enhancements to improve processor lifetime reliability. A commonly reported reliability metric is mean time...
Pradeep Ramachandran, Sarita V. Adve, Pradip Bose,...
ICCD
2007
IEEE
151views Hardware» more  ICCD 2007»
16 years 3 months ago
Benchmarks and performance analysis of decimal floating-point applications
The IEEE P754 Draft Standard for Floating-point Arithmetic provides specifications for Decimal Floating-Point (DFP) formats and operations. Based on this standard, many developer...
Liang-Kai Wang, Charles Tsen, Michael J. Schulte, ...
IUI
2010
ACM
16 years 3 months ago
Raconteur: from intent to stories
When editing a story from a large collection of media, such as photos and video clips captured from daily life, it is not always easy to understand how particular scenes fit into ...
Pei-Yu Chi, Henry Lieberman