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DFT
1999
IEEE
72views VLSI» more  DFT 1999»
15 years 11 months ago
Yield Estimation of VLSI Circuits with Downscaled Layouts
This paper describes the yield estimation approach to layout scaling of submicron VLSI circuits. The presented method makes it feasible to find scaling factor of the IC design whi...
Witold A. Pleskacz
MSS
1999
IEEE
73views Hardware» more  MSS 1999»
15 years 11 months ago
Hiding HSM Systems from the User
File life-times longer than the life-time of HSMsystems make it necessary to move files from one HSM-system to another. Such a migration takes a long time and cannot be hidden fro...
Hartmut Reuter
TOOLS
1999
IEEE
15 years 11 months ago
Optimizations of Eiffel Programs: Smalleiffel, the GNU Eiffel Compiler
The design of the Eiffel language makes it possible to perform global optimizations on Eiffel programs. In this paper, we describe some of the techniques we used in SmallEiffel, T...
Dominique Colnet, Olivier Zendra
ICS
1999
Tsinghua U.
15 years 11 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
HCW
1998
IEEE
15 years 11 months ago
Steps Toward Understanding Performance in Java
Java's design goals of portability, safety, and ubiquity make it a potentially ideal language for large-scale heterogeneous computing. One of the remaining challenges is to c...
Doug Lea