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ISCAS
2006
IEEE
102views Hardware» more  ISCAS 2006»
16 years 25 days ago
A fast dual-field modular arithmetic logic unit and its hardware implementation
— We propose a fast Modular Arithmetic Logic Unit (MALU) that is scalable in the digit size (d) and the field size (k). The datapath of MALU has chains of Carry Save Adders (CSA...
Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
ISCAS
2006
IEEE
163views Hardware» more  ISCAS 2006»
16 years 25 days ago
ASIC hardware implementation of the IDEA NXT encryption algorithm
— Symmetric-key block ciphers are often used to provide data confidentiality with low complexity, especially in the case of dedicated hardware implementations. IDEA NXT is a nov...
Marco Macchetti, Wenyu Chen
ISCC
2006
IEEE
109views Communications» more  ISCC 2006»
16 years 25 days ago
A Call Level Adaptive Bandwidth Allocation Scheme Based on Lyapunov Control Theory
— In this paper, we propose an adaptive capacity allocation scheme at the call level for a blocked call cleared loss system. The scheme aims to maintain the connection blocking p...
Hesham Bin-Abbas, David Tipper
ISQED
2006
IEEE
176views Hardware» more  ISQED 2006»
16 years 25 days ago
Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
Zhiyu Liu, Volkan Kursun
IWPC
2006
IEEE
16 years 25 days ago
JComp: A Reuse-Driven Componentization Framework for Java Applications
Program componentization has been proved to be an effective way to increase the speed and cost-effectiveness of reusing, maintaining, and understanding existing software systems. ...
Shimin Li, Ladan Tahvildari