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CCECE
2006
IEEE
16 years 13 days ago
A High-Speed Low-Power Rail-to-Rail Buffer Amplifier for LCD Application
A high-speed low-power rail-to-rail class-B buffer amplifier, which is suitable for liquid crystal display applications, is proposed. The summing circuit is biased by the constant...
Chih-Wen Lu, Peter H. Xiao
DATE
2006
IEEE
115views Hardware» more  DATE 2006»
16 years 13 days ago
Optimal periodic testing of intermittent faults in embedded pipelined processor applications
Today’s nanometer technology trends have a very negative impact on the reliability of semiconductor products. Intermittent faults constitute the largest part of reliability fail...
Nektarios Kranitis, Andreas Merentitis, N. Laoutar...
DATE
2006
IEEE
80views Hardware» more  DATE 2006»
16 years 13 days ago
Energy-efficient FPGA interconnect design
Despite recent advances in FPGA devices and embedded cores, their deployment in commercial products remains rather limited due to practical constraints on, for example, cost, size...
Maurice Meijer, Rohini Krishnan, Martijn T. Benneb...
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
16 years 13 days ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...
ECBS
2006
IEEE
126views Hardware» more  ECBS 2006»
16 years 13 days ago
Experiments and Investigations for the Personal High Performance Computing (PHPC) built on top of the 64-bit processing and clus
The motivation and objective for this paper is to demonstrate “Personal High Performance Computing (PHPC)”, which requires only a smaller number of computers, resources and sp...
Victor Chang