This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
The Collaborative Computing Transport Layer (CCTL) is a communication substrate consisting of a suite of multiparty protocols, providing varying service qualities among process gr...
Injong Rhee, Shun Yan Cheung, Phillip W. Hutto, Va...
Designing and planning of the switching, signaling and support network is a fairly complex process in cellular mobile network. In this paper, the problem of assigning cells to swi...
Determining the provenance of data, i.e. the process that led to that data, is vital in many disciplines. For example, in science, the process that produced a given result must be...
Simon Miles, Steve Munroe, Michael Luck, Luc Morea...
We propose a new wavelet compression algorithm based on the rate-distortion optimization for densely sampled triangular meshes. Exploiting the normal remesher of Guskov et al., th...