Sciweavers

3729 search results - page 435 / 746
» METRICS: a system architecture for design process optimizati...
Sort
View
IESS
2007
Springer
128views Hardware» more  IESS 2007»
16 years 29 days ago
An Interactive Design Environment for C-based High-Level Synthesis
: Much effort in RTL design has been devoted to developing “push-button” types of tools. However, given the highly complex nature, and lack of control on RTL design, push-butt...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
FDL
2003
IEEE
16 years 3 days ago
Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
Mauricio Ayala-Rincón, Ricardo P. Jacobi, C...
SRDS
2003
IEEE
16 years 2 days ago
Performance and Effectiveness Analysis of Checkpointing in Mobile Environments
Many mathematical models have been proposed to evaluate the execution performance of an application with and without checkpointing in the presence of failures. They assume that th...
Xinyu Chen, Michael R. Lyu
PVLDB
2008
89views more  PVLDB 2008»
15 years 6 months ago
Constrained physical design tuning
Abstract Existing solutions to the automated physical design problem in database systems attempt to minimize execution costs of input workloads for a given storage constraint. In t...
Nicolas Bruno, Surajit Chaudhuri
IEEEARES
2008
IEEE
16 years 1 months ago
Reliability Analysis using Graphical Duration Models
Reliability analysis has become an integral part of system design and operating. This is especially true for systems performing critical tasks such as mass transportation systems....
Roland Donat, Laurent Bouillaut, Patrice Aknin, Ph...