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IESS
2007
Springer
162views Hardware» more  IESS 2007»
16 years 28 days ago
Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs
Abstract This paper presents an embedded system design toolchain for automatic generation of parallel code runnable on symmetric multiprocessor systems from an initial sequential s...
Fabrizio Ferrandi, Luca Fossati, Marco Lattuada, G...
ISCA
2008
IEEE
201views Hardware» more  ISCA 2008»
15 years 6 months ago
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
CICLING
2009
Springer
16 years 7 months ago
Semantic Clustering for a Functional Text Classification Task
Abstract. We describe a semantic clustering method designed to address shortcomings in the common bag-of-words document representation for functional semantic classification tasks....
Thomas Lippincott, Rebecca J. Passonneau
ANCS
2010
ACM
15 years 4 months ago
An architecture for software defined cognitive radio
As we move forward towards the next generation of wireless protocols, the push for a better radio physical layer is ever increasing. Conventional radio architectures are limited t...
Aveek Dutta, Dola Saha, Dirk Grunwald, Douglas C. ...
DAC
2008
ACM
16 years 7 months ago
Characterizing chip-multiprocessor variability-tolerance
Spatially-correlated intra-die process variations result in significant core-to-core frequency variations in chip-multiprocessors. An analytical model for frequency island chip-mu...
Sebastian Herbert, Diana Marculescu