Weconsidertheproblem of optimal, data-dependentzerotree designfor use in weighted universal zerotree codes for image compression.A weighted universalzerotree code (WUZC) is a data...
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
Robert Cohn, Thomas R. Gross, Monica S. Lam, P. S....
This paper addresses the allocation of link capacities in the automated design process of a network-on-chip based system. Communication resource costs are minimized under Quality-...
Design of high performance Web servers has become a recent research thrust to meet the increasing demand of networkbased services. In this paper, we propose a new Web server archi...
Gyu Sang Choi, Jin-Ha Kim, Deniz Ersoz, Chita R. D...
Sequential place and route tools for FPGAs are inherently weak at addressing both wirability and timing optimizations. This is primarily due to the difficulty in predicting these ...