Sciweavers

3729 search results - page 278 / 746
» METRICS: a system architecture for design process optimizati...
Sort
View
LCTRTS
2007
Springer
16 years 25 days ago
Enabling compiler flow for embedded VLIW DSP processors with distributed register files
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Y...
VECPAR
2004
Springer
16 years 1 days ago
Distributed Processing of Large BioMedical 3D Images
The Human Genetics Unit (HGU) of the Medical Research Council (MRC) in Edinburgh has developed the Edinburgh Mouse Atlas, a spatial temporal framework to store and analyze biologic...
Konstantinos Liakos, Albert Burger, Richard A. Bal...
TWC
2008
177views more  TWC 2008»
15 years 6 months ago
Generalized Design of Multi-User MIMO Precoding Matrices
In this paper we introduce a novel linear precoding technique. The approach used for the design of the precoding matrix is general and the resulting algorithm can address several o...
Veljko Stankovic, Martin Haardt
FCCM
2004
IEEE
133views VLSI» more  FCCM 2004»
15 years 10 months ago
A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
Zachary K. Baker, Viktor K. Prasanna
170
Voted
DAC
2004
ACM
16 years 7 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...