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ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
16 years 1 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
CIDR
2007
144views Algorithms» more  CIDR 2007»
15 years 8 months ago
Cache-Oblivious Query Processing
We propose a radical approach to relational query processing that aims at automatically and consistently achieving a good performance on any memory hierarchy. We believe this auto...
Bingsheng He, Qiong Luo
ARCS
2010
Springer
15 years 10 months ago
A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems
Power and resource management are key goals for the success of modern battery-supplied multimedia devices. This kind of devices are usually based on SoCs with a wide range of subsy...
Patrick Bellasi, William Fornaciari, David Siorpae...
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
16 years 21 days ago
Mixed-signal design of a digital input power amplifier for automotive audio applications
With reference to digital input power amplifier for automotive audio applications, the paper presents an exhaustive exploration of the huge mixed-signal space to find optimal trad...
Sergio Saponara, Pierangelo Terreni
ACSAC
2004
IEEE
15 years 10 months ago
Tracing the Root of "Rootable" Processes
In most existing systems, the authorization check for system resource access is based on the user ID of the running processes. Such systems are vulnerable to password stealing/cra...
Amit Purohit, Vishnu Navda, Tzi-cker Chiueh