3729 search results - page 179 / 746 » METRICS: a system architecture for design process optimizati... |
176
Voted
TVLSI
2008
15 years 6 months ago
2008
In this paper, we study and analyze the computational complexity of the deblocking filter in H.264/AVC baseline decoder based on SimpleScalar/ARM simulator. The simulation result s...
182
Voted
ICC
2009
IEEE
16 years 1 months ago
2009
IEEE
—We consider a system with a single base station communicating with multiple users over orthogonal channels while being assisted by multiple relays. Several recent works have sug...
170
Voted
ISCAS
2005
IEEE
16 years 4 days ago
2005
IEEE
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
163
Voted
ISLPED
2003
ACM
15 years 11 months ago
2003
ACM
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...
149
Voted
ICCAD
2005
IEEE
16 years 3 months ago
2005
IEEE
Abstract — This paper describes a practical technique for the optimal scheduling of control dominated systems minimizing the weighted average latency over all control branches. S...