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DAC
2009
ACM
16 years 1 months ago
Yield-driven iterative robust circuit optimization algorithm
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
Yan Li, Vladimir Stojanovic
VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
16 years 6 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
DATE
2008
IEEE
153views Hardware» more  DATE 2008»
16 years 29 days ago
An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications
Novel reconfigurable computing platforms enable efficient realizations of complex signal processing applications by allowing exploitation of parallelization resulting in high thro...
Sankalita Saha, Jason Schlessman, Sebastian Puthen...
GECCO
2005
Springer
115views Optimization» more  GECCO 2005»
16 years 20 hour ago
Search-based improvement of subsystem decompositions
The subsystem decomposition of a software system degrades gradually during its lifetime and therefore it gets harder and harder to maintain. As a result this decomposition needs t...
Olaf Seng, Markus Bauer, Matthias Biehl, Gert Pach...
ASPDAC
2004
ACM
106views Hardware» more  ASPDAC 2004»
15 years 12 months ago
A novel memory size model for variable-mapping in system level design
— It is predicted that 70% of the chip area will be occupied by memories in future system-onchips. The minimization of on-chip memory hence becomes increasingly important for cos...
Lukai Cai, Haobo Yu, Daniel Gajski