1342 search results - page 51 / 269 » MEMS Design And Verification |
170
click to vote
ENTCS
2008
15 years 6 months ago
2008
We describe the design and the present state of the verification tool Augur 2 which is currently being developed. It is based on Augur 1, a tool which can analyze graph transforma...
166
click to vote
ENTCS
2006
15 years 6 months ago
2006
Effective formal verification tools require that robust implementations of automatic procedures for first-order logic and satisfiability modulo theories be integrated into express...
144
click to vote
DATE
2006
IEEE
16 years 8 days ago
2006
IEEE
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...
167
click to vote
ICCAD
1996
IEEE
15 years 10 months ago
1996
IEEE
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
147
click to vote
ASYNC
2007
IEEE
15 years 10 months ago
2007
IEEE
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...