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    ARVLSI
    2001
    IEEE
    228views VLSI» more  ARVLSI 2001»
    Design, Verification, and Test of a True Single-Phase 8-bit Adiabatic Multiplier
    15 years 9 months ago
    Design, Verification, and Test of a True Single-Phase 8-bit Adiabatic Multiplier
    Download  www.eecs.umich.edu
    Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
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    ATS
    2001
    IEEE
    74views Hardware» more  ATS 2001»
    An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model
    15 years 9 months ago
    An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model
    Download  nthucad.cs.nthu.edu.tw
    Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou
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    EURODAC
    1995
    IEEE
    294views VHDL» more  EURODAC 1995»
    A classification of design steps and their verification
    15 years 9 months ago
    A classification of design steps and their verification
    Download  www.cs.york.ac.uk
    Wolfgang Ecker
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    EURODAC
    1995
    IEEE
    155views VHDL» more  EURODAC 1995»
    Design and use of a system-level specification and verification methodology
    15 years 9 months ago
    Design and use of a system-level specification and verification methodology
    Download  www.cs.york.ac.uk
    M. M. Kamal Hashmi, Alistair C. Bruce
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    ICCAD
    1995
    IEEE
    76views Hardware» more  ICCAD 1995»
    Design verification via simulation and automatic test pattern generation
    15 years 9 months ago
    Design verification via simulation and automatic test pattern generation
    Download  www.ece.ucdavis.edu
    Hussain Al-Asaad, John P. Hayes
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