1342 search results - page 174 / 269 » MEMS Design And Verification |
155
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
Bounded Model Checking (BMC) based on Boolean Satisfiability (SAT) procedures has recently gained popularity as an alternative to BDD-based model checking techniques for finding b...
155
click to vote
DAC
2006
ACM
16 years 7 months ago
2006
ACM
Chips manufactured in 90 nm technology have shown large parametric variations, and a worsening trend is predicted. These parametric variations make circuit optimization difficult ...
155
click to vote
ISQED
2005
IEEE
15 years 11 months ago
2005
IEEE
Today's System-on-a-Chip (SoC) design methodology provides an efficient way to develop highly integrated systems on a single chip by utilizing pre-designed intellectual prope...
182
click to vote
ICCAD
2009
IEEE
15 years 4 months ago
2009
IEEE
Economic incentives have driven the semiconductor industry to separate design from fabrication in recent years. This trend leads to potential vulnerabilities from untrusted circui...
167
click to vote
DAC
2001
ACM
16 years 7 months ago
2001
ACM
Boolean Satisfiability is probably the most studied of combinatorial optimization/search problems. Significant effort has been devoted to trying to provide practical solutions to ...