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» MEMS Design And Verification
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DAC
2004
ACM
16 years 7 months ago
Exploiting structure in symmetry detection for CNF
Instances of the Boolean satisfiability problem (SAT) arise in many areas of circuit design and verification. These instances are typically constructed from some human-designed ar...
Paul T. Darga, Mark H. Liffiton, Karem A. Sakallah...
DAC
2005
ACM
16 years 7 months ago
Efficient SAT solving: beyond supercubes
SAT (Boolean satisfiability) has become the primary Boolean reasoning engine for many EDA applications, so the efficiency of SAT solving is of great practical importance. Recently...
Domagoj Babic, Jesse D. Bingham, Alan J. Hu
DAC
2005
ACM
16 years 7 months ago
Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubn...
ICSE
2008
IEEE-ACM
16 years 6 months ago
PLURAL: checking protocol compliance under aliasing
Enforcing compliance to API usage protocols is notoriously hard due to possible aliasing of objects through multiple references. In previous work we proposed a sound, modular appr...
Kevin Bierhoff, Jonathan Aldrich
GPCE
2007
Springer
16 years 16 days ago
Safe composition of product lines
Programs of a software product line can be synthesized by composing modules that implement features. Besides high-level domain constraints that govern the compatibility of feature...
Sahil Thaker, Don S. Batory, David Kitchin, Willia...