The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
System-on-Chip (SOC) and other complex distributed hardware/software systems contain heterogeneous components such as DSPs, micro-controllers, application specific logic etc., whi...
Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shu...
Poor performance of HW/SW cosimulation is mainly caused by synchronization requirement between component simulators. Virtual synchronization technique was proposed to remove the n...
This paper presents an approach and a toolset for exploiting the benefits of conceptual modeling in the quality evaluation tasks that take place both before the deployment and dur...